منابع مشابه
$n$-cocoherent rings, $n$-cosemihereditary rings and $n$-V-rings
Let $R$ be a ring, and let $n, d$ be non-negative integers. A right $R$-module $M$ is called $(n, d)$-projective if $Ext^{d+1}_R(M, A)=0$ for every $n$-copresented right $R$-module $A$. $R$ is called right $n$-cocoherent if every $n$-copresented right $R$-module is $(n+1)$-coprese-nted, it is called a right co-$(n,d)$-ring if every right $R$-module is $(n, d)$-projective. $R$...
متن کامل2011-09-17-149 Paratuberculosis databases updated (2011-09-16)
The effectiveness of gamma irradiation on the inactivation of Mycobacterium paratuberculosis, Mycobacterium bovis and Mycobacterium tuberculosis in fresh soft cheese that prepared from artificially inoculated milk samples was studied. Irradiation at dose of 2 kGy was sufficient for the complete inactivation of these mycobacteria as they were not detected in the treated samples during storage at...
متن کاملLecture : Submodular Optimization — June 16 , 2011
Applications in complex systems such as the Internet have spawned recent interest in studying situations involving multiple agents with their individual cost or utility functions. In this lecture, we introduce an algorithmic framework for studying combinatorial problems in the presence of multiple agents with submodular cost functions. We study several fundamental covering problems (Vertex Cove...
متن کامل$n$-cocoherent rings, $n$-cosemihereditary rings and $n$-v-rings
let $r$ be a ring, and let $n, d$ be non-negative integers. a right $r$-module $m$ is called $(n, d)$-projective if $ext^{d+1}_r(m, a)=0$ for every $n$-copresented right $r$-module $a$. $r$ is called right $n$-cocoherent if every $n$-copresented right $r$-module is $(n+1)$-coprese-nted, it is called a right co-$(n,d)$-ring if every right $r$-module is $(n, d)$-projective. $r$ ...
متن کاملCompact, Loadable 16- and 32-bit Binary Counters
Figure 1 is a block diagram representation of the I/O and architecture for a 16 or 32-bit counter. Pin CLK is the clock signal, RST the reset signal, and LOAD the load data signal. CLK is a positive, edge-triggered synchronous signal, and LOAD is an active low, synchronous signal. Pins D0 through D15, 31 are the load data inputs, and pins Q0 through Q15, 31 are the count bits. Pin Ci is the car...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
ژورنال
عنوان ژورنال: Encontros Bibli: revista eletrônica de biblioteconomia e ciência da informação
سال: 2011
ISSN: 1518-2924
DOI: 10.5007/21312